Microchip and Acacia Collaborate to Enable Optimized Terabit-Scale Data Center Interconnect Systems
CHANDLER, Ariz., Aug. 13, 2024 (GLOBE NEWSWIRE) — The latest data center architectures and increased traffic are driving higher bandwidth requirements between data centers. To address this challenge, system developers must streamline the development of a new generation of 1.2 Tbps (1.2T) transport solutions across a wide range of client configurations. This requires that today’s terabit-scale Ethernet PHY devices and coherent optical modules interoperate with each other in Data Center Interconnect (DCI) and metro transport networks. Microchip Technology (Nasdaq:MCHP) today announces that it has worked with Acacia to demonstrate the fourth generation of interoperability between Microchip’s META-DX2 Ethernet PHY family and Acacia’s Coherent Interconnect Module 8 (CIM 8).